Creation of high mobility channels in thin-body SOI devices

ABSTRACT

A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film and a second layer of strained film. The SOI wafer has a stack structure of a second base substrate and a layer of oxidized film. The SOI wafer is attached to the wafer and is heated at a first temperature. This causes a silicon dioxide (SiO 2 ) dangling bond to form on the second base substrate of the SOI wafer, transferring the strained film from one wafer to the other.

FIELD OF THE INVENTION

[0001] This invention relates to a method for fabricating strain on awafer. In particular, the invention relates to a method for fabricatingstrain on a silicon-on-insulator (SOI) wafer.

BACKGROUND OF THE INVENTION

[0002] The mobility of the carriers in a device is directly related tothe its current. The higher the current the faster the device isoperated. Devices can be built as bulk devices, devices on silicon oninsulator (SOI) or any other types. Each type has its owncharacteristics that make it attractive. As these devices are scaleddown, one of the characteristics that may be of interest is the speed ofmetal oxide semiconductor (MOS) transistors. One way to make a speediertransistor is to create a thinner gate oxide and therefore create morecapacitance, which results more charge. Another way is to create a highmobility channel.

[0003] To have a high mobility channel is to have high carriers mobilityin the device. Straining the channel region of the MOS devices produceshigher mobility of the carriers since tensile strained silicon causesincreases in the mobility of both electrons and holes. Higher themobility of these carriers means higher current; therefore fasterdevices or faster chips.

[0004] The method of growing strained silicon film on top of SiliconGermanium (SiGe) layer in bulk devices (e.g., silicon substrate) isstandard and is well known in the art. Growing strained silicon filmonto silicon-on-insulator wafer, however, is difficult since it wouldthicken the active silicon layer on the SOI beyond the range of usefulinterest.

[0005] A method of fabrication of a thin film strained silicon layer onan oxide substrate (i.e., thin body SOI) is described.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The features and advantages of the present invention will becomeapparent from the following detailed description of the presentinvention in which:

[0007]FIG. 1 is a diagram illustrating a sectional view of a waferhaving a stack structure of a conventional substrate with a relaxedlayer and a strained layer.

[0008]FIG. 2 is a diagram illustrating FIG. 1 with an implantation ofhydrogen onto the substrate to create stress according to one embodimentof the invention.

[0009]FIG. 3 is a diagram illustrating FIG. 2 with a deposition of oxidelayer onto the strained layer according of one embodiment of theinvention.

[0010]FIG. 4 is a diagram illustrating FIG. 3 brought in contact withoxidized silicon wafer according to one embodiment of the invention.

[0011]FIG. 5 is a diagram illustrating FIG. 4 having a heat treatment tobond the two wafers according to one embodiment of the invention.

[0012]FIG. 6 is a diagram illustrating FIG. 5 with further heattreatment to transfers the strained layer to the oxidized waferaccording to one embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0013] In the following, for purposes of explanation, numerous detailsare set forth in order to provide a thorough understanding of thepresent invention. However, it will be apparent to one skilled in theart that theses specific details are not required in order to practicethe present invention.

[0014]FIG. 1 is a diagram illustrating a sectional view of a waferhaving a stack structure of a conventional substrate with a strainedsilicon layer. The wafer 100 may includes heteroepitaxial layers of astarting silicon platform (e.g., substrate) 101, a silicon germanium(SiGe) alloy graded relaxed buffer layer 102, and a strained siliconlayer 104.

[0015] The relaxed SiGe layer 102 is formed upon or deposited on top thesilicon substrate 101. The strained silicon layer 104 is then formed onthe relaxed SiGe layer 102. In one embodiment, the relaxed SiGe layer102, and the strained silicon layer 104 are formed by an epitaxialgrowth process. In other words, the process includes epitaxial growth ofrelaxed SiGe on the silicon wafer 101 to create the relaxed SiGe layer102, epitaxial growth of a thin silicon film on the stack structure ofthe silicon wafer 101 to create the strained silicon film 104. Therelaxed SiGe layer has the thickness in the range of approximately from0.1 to 3.0. It is contemplated that the forming of these layers in thestack structure may be done in any other process other than theepitaxial growth process.

[0016]FIG. 2 is a diagram illustrating FIG. 1 with an implantation of anion onto the substrate to create stress according to one embodiment ofthe invention. With the stack structure of the silicon wafer 101discussed in FIG. 1, in one embodiment, hydrogen ions are implanted intothe silicon wafer 101 to create stress on the wafer. The implanting ofthe hydrogen ions is performed to result in an embrittled region in oneof the layers in the stack structure of the wafer 101. In other words,the stress creates an embrittled region on one of the layers in thestack structure of the silicon wafer 101. The location of the embrittledregion depends of the energy used in the implanting process. The energylevel used in the implanting process is in the range from approximately1 keV to 20 keV and the dose used is in the range from approximately1E116/cm³ to 1E18/cm³. It is contemplated that the other type of ionsmay be used in place of hydrogen in the implanting process to create theembrittled region in the wafer 101.

[0017]FIG. 3 is a diagram illustrating FIG. 2 with a deposition of oxidelayer onto the strained silicon layer 104 according of one embodiment ofthe invention. A thin oxide layer 301 is deposited (i.e., grown) ontothe strained silicon layer 104. The deposition of oxide layer 301 on thestrained silicon film 104 is used for adhesion purpose. After thedeposition process, a plasma treatment is applied on the surface of thesilicon wafer 101. This plasma treatment is performed at lowtemperatures to ensure the bonding of the stack structures. Thetemperature may be in the range of approximately from 100° C. to 400° C.

[0018]FIG. 4 is a diagram illustrating FIG. 3 brought into contact withthe SOI substrate wafer (e.g., oxidized wafer) 401 according to oneembodiment of the invention. The silicon wafer 101 as described in FIG.3 is brought into contact with the SOI substrate wafer 401.

[0019] The oxidized wafer 401 is a SOI substrate wafer and is plasmatreated before making contact with the silicon wafer 101. The strainedsilicon film 104 is later transferred to this oxidized wafer 401. Anywell-known process may fabricate the SOI substrate 401.

[0020]FIG. 5 is a diagram illustrating FIG. 4 having a heat treatment tobond the two wafers according to one embodiment of the invention. Oncethe silicon wafer 101 and the oxidized wafer 401 are in contact, a heattreatment is performed on the two contacted wafers. The temperature usedin the heat treatment is in the range of approximately 100° C. to 300°C. This heat treatment results in the bonding of the two wafers 101 and401. In other words, the heat treatment on the two wafers causes theSiO₂ dangling bond on both of the wafer surfaces to bond to each other.It is noted that this technique is also well known in the art.

[0021]FIG. 6 is a diagram illustrating FIG. 5 with further heattreatment to transfer the strained layer to the oxidized wafer accordingto one embodiment of the invention. After the lower heat treatment toresult the bonding of silicon wafer 101 and oxidized wafer 401, highertemperature heat treatment is applied. This temperature used in thisfurther heat treatment ranges from approximately 400° C. to 600° C. Thehigher temperature heat treatment results in the bonding of surface 104to wafer 101 at the SiO2 interface 601. The further heat treatment alsoresults in the separation of the two wafers at the embrittled region(described in FIG. 2). After the further heat treatment, the two wafers101 and 401 are delaminated along the embrittled implanted region (i.e.,H-implanted SiGe region). This effectively separates the two wafers andthe strained silicon film 104 is transferred to the SOI-like wafer 401.In one embodiment, the embrittled region resides on the relaxed SiGelayer 102. When the two wafers 101 and 401 separate, the strainedsilicon layer 104 and the part of the relaxed SiGe layer 102 aretransferred to the SOI wafer 401. Part of relaxed SiGe layer 102 is thenetched off to result the wafer 401 with the strained silicon layer 104on top of the SiO₂ layer. This results in the transfer of the strainedsilicon layer 104 to the SOI wafer 401(e.g., oxidized wafer 401). It iscontemplated that the etching may be wet or plasma etching; however, wetetching is used to better remove the entire SiGe residue on the strainedsilicon film.

[0022] In one embodiment where there is no implanting step (i.e.,hydrogen implant), the embrittled region is not formed. The strainedsilicon layer 103 is transferred to the SOI wafer 401 by abonded-etchback process on the silicon wafer 101 and the strained SiGe103. This gives the strained silicon film on the SOI wafer 401.

[0023] While this invention has been described with reference toillustrative embodiments, this description is not intended to beconstrued in a limiting sense. Various modifications of the illustrativeembodiments, as well as other embodiments of the invention, which areapparent to persons skilled in the art to which the invention pertainsare deemed to lie within the spirit and scope of the invention.

What is claimed is:
 1. A method comprising: providing a first waferhaving a stack structure of a first base substrate, a layer of relaxedfilm, and a first layer of strained film, depositing a layer of oxideonto the layer of strained film to provide an adhesion surface to thefirst wafer; providing a second wafer, the second wafer being a siliconon insulation (SOI) wafer having a stack structure of a second basesubstrate and a layer of oxidized film; attaching the first and secondwafers; and heating the first and second wafers at a first temperatureto cause a silicon dioxide (SiO₂) adhesion of the first substrate to thesecond substrate.
 2. The method of claim 1 further comprising:implanting hydrogen onto the first wafer before depositing the layer ofoxide onto the second layer of strained film to create an embrittledregion in the layer of relaxed film.
 3. The method of claim 2 furthercomprising: heating the first and second wafers at a second temperatureto delaminate the two wafers along the embrittled region to form thesecond wafer having the layer of relaxed film.
 4. The method of claim 3further comprising: etching the relaxed film on the surface of thesecond wafer to expose the strained film.
 5. The method of claim 1wherein the first and second base substrates are made of siliconmaterial.
 6. The method of claim 1 wherein the layer of relaxed film isa relaxed Silicon Germanium (SiGe) layer having a thickness in a rangeof approximately 0.1 to 3.0 um.
 7. The method of claim 1 wherein thelayer of oxide is deposited at a thickness range of approximately 50 to3000 A.
 8. The method of claim 2 wherein the hydrogen is implanted at anenergy range of approximately 1 to 20 keV.
 9. The method of claim 3wherein the second temperature is higher than the first temperature. 10.The method of claim 3 wherein the first temperature is in a range ofapproximately 100° C. to 300° C.
 11. The method of claim 3 wherein thesecond temperature is in a range of 400° C. to 600° C.
 12. The method ofclaim 1 further comprising: etching the first base substrate, and thelayer of relaxed film to result in the strain of film on the surface ofthe SOI wafer.
 13. The method of claim 12 wherein the etching of thefirst layer of strained film comprises wet etching the layer of relaxedfilm.
 14. A wafer comprising: a silicon layer; a relaxed SiGe layer; anda strained silicon layer in contact with the relaxed SiGe layer, thestrained silicon layer being transferred to the top of the relaxed SiGelayer by a heat treatment.
 15. The wafer of claim 14 wherein the relaxedSiGe layer contains an embrittled region.
 16. The wafer of claim 15wherein the embrittled report is created by implanting hydrogen ions.17. A wafer comprising: a silicon layer; a SiO₂ layer in contact withthe silicon layer; and a strained silicon layer on top of the SiO₂layer, the strained silicon layer being transferred to an oxidized waferby a heat treatment.
 18. The wafer of claim 17 wherein the oxidizedwafer contains a relaxed SiGe layer.
 19. The wafer of claim 18 whereinthe relaxed SiGe layer contains an embrittled region.